Kevin

FPGA Engineer

Hello I'm Kevin Roshan. I am pursuing my BTECH in Electronics and Communication Engineering. Expected to pass out in 2027. I am interested in Computer Architectures, Digital Signal Processing and FPGAs. My focus is understanding and create projects and develop skills in those areas.

Where I've Worked

Matlab Intern @ CUSAT 2025 JUNE

Explored and studies various areas of matlab and understanding about simulink and matlab interfaces and all. Completed 30 hr course on different aspects of Matlab

Verilog Intern @ Petaera Technology 2025 JULY

Worked on Verilog projects learnt about cocotb verification. Created a 19 bit processor and verified it using cocotb during the course of internship

FPGA/RF intern @ Asnaviram Networks 2026 May - present

FPGA based signal processing system design and development

What I've Built

UART Streamed FIR Filter on IceBreaker FPGA

Implemented a streamed FIR low-pass filter with UART communication, verified both through Cocotb testbenches and on the IceBreaker FPGA. A noisy signal was transmitted via UART using Python and filtered in hardware.

Verilog Cocotb Python UART

DTMF Keyboard

Designed a DTMF keyboard system by first developing and validating the implementation in MATLAB, then implementing and testing it on the IceBreaker FPGA board.

Verilog MATLAB FPGA

Maze Solving Bot using FPGA

Developed an FPGA-based maze-solving robot as part of the IIT Bombay e-Yantra competition and implemented the design on a Cyclone IV FPGA.

Verilog Cyclone IV FPGA e-Yantra

32-Bit RISC-V Processor

Implemented a multicycle, non-pipelined 32-bit RISC-V processor in Verilog. Currently extending the processor with memory-mapped peripherals.

Verilog RISC-V Computer Architecture